Defines | |
IOMUX/PAD Bit field definitions | |
#define | MUX_I 0 |
#define | PAD_I 10 |
#define | GPIO_I 21 |
#define | NON_GPIO_PORT 0x7 |
#define | PIN_TO_MUX_MASK ((1 << (PAD_I - MUX_I)) - 1) |
#define | PIN_TO_PAD_MASK ((1 << (GPIO_I - PAD_I)) - 1) |
#define | PIN_TO_ALT_GPIO_MASK ((1 << (MUX_IO_I - GPIO_I)) - 1) |
#define | NON_MUX_I PIN_TO_MUX_MASK |
#define | NON_PAD_I PIN_TO_PAD_MASK |
#define | PIN_TO_IOMUX_MUX(pin) ((pin >> MUX_I) & PIN_TO_MUX_MASK) |
#define | PIN_TO_IOMUX_PAD(pin) ((pin >> PAD_I) & PIN_TO_PAD_MASK) |
#define | PIN_TO_ALT_GPIO(pin) ((pin >> GPIO_I) & PIN_TO_ALT_GPIO_MASK) |
#define | PIN_TO_IOMUX_INDEX(pin) (PIN_TO_IOMUX_MUX(pin) >> 2) |
Typedefs | |
typedef enum iomux_config | iomux_pin_cfg_t |
typedef enum iomux_pad_config | iomux_pad_config_t |
typedef enum iomux_input_config | iomux_input_config_t |
Enumerations | |
enum | iomux_config { IOMUX_CONFIG_ALT0, IOMUX_CONFIG_ALT1, IOMUX_CONFIG_ALT2, IOMUX_CONFIG_ALT3, IOMUX_CONFIG_ALT4, IOMUX_CONFIG_ALT5, IOMUX_CONFIG_ALT6, IOMUX_CONFIG_ALT7, IOMUX_CONFIG_GPIO, IOMUX_CONFIG_SION = 0x1 << 4 } |
enum | iomux_pad_config |
enum | iomux_input_config { , INPUTCONFIG_NONE = 0, INPUTCONFIG_GPIO = 1 << 0, INPUTCONFIG_FUNC = 1 << 1, INPUTCONFIG_ALT1 = 1 << 2, INPUTCONFIG_ALT2 = 1 << 3 } |
Functions | |
int | mxc_request_iomux (iomux_pin_name_t pin, iomux_pin_cfg_t config) |
void | mxc_free_iomux (iomux_pin_name_t pin, iomux_pin_cfg_t config) |
void | mxc_iomux_set_pad (iomux_pin_name_t pin, u32 config) |
unsigned int | mxc_iomux_get_pad (iomux_pin_name_t pin) |
void | mxc_iomux_set_input (iomux_input_select_t input, u32 config) |
#define GPIO_I 21 |
Starting bit position within each entry of iomux_pins to represent which mux mode is for GPIO (0-based)
#define MUX_I 0 |
In order to identify pins more effectively, each mux-controlled pin's enumerated value is constructed in the following way:
------------------------------------------------------------------- 31-29 | 28 - 24 | 23 - 21 | 20 - 10| 9 - 0 ------------------------------------------------------------------- IO_P | IO_I | GPIO_I | PAD_I | MUX_I -------------------------------------------------------------------
Bit 0 to 9 contains MUX_I used to identify the register offset (0-based. base is IOMUX_module_base) defined in the Section "sw_pad_ctl & sw_mux_ctl details" of the IC Spec. The similar field definitions are used for the pad control register. For example, the MX51_PIN_ETM_D0 is defined in the enumeration: ( (0x28 - MUX_I_START) << MUX_I)|( (0x250 - PAD_I_START) << PAD_I) It means the mux control register is at register offset 0x28. The pad control register offset is: 0x250 and also occupy the least significant bits within the register.
Starting bit position within each entry of iomux_pins to represent the MUX control register offset
#define PAD_I 10 |
Starting bit position within each entry of iomux_pins to represent the PAD control register offset
typedef enum iomux_input_config iomux_input_config_t |
various IOMUX input functions
typedef enum iomux_pad_config iomux_pad_config_t |
various IOMUX pad functions
typedef enum iomux_config iomux_pin_cfg_t |
various IOMUX output functions
enum iomux_config |
various IOMUX output functions
enum iomux_input_config |
enum iomux_pad_config |
various IOMUX pad functions
void mxc_free_iomux | ( | iomux_pin_name_t | pin, | |
iomux_pin_cfg_t | config | |||
) |
Release ownership for an IO pin
pin | a name defined by iomux_pin_name_t | |
config | config as defined in iomux_pin_ocfg_t |
unsigned int mxc_iomux_get_pad | ( | iomux_pin_name_t | pin | ) |
This function gets the current pad value for a IOMUX pin.
pin | a pin number as defined in iomux_pin_name_t |
void mxc_iomux_set_input | ( | iomux_input_select_t | input, | |
u32 | config | |||
) |
This function configures input path.
input | index of input select register as defined in iomux_input_select_t | |
config | the binary value of elements defined in iomux_input_config_t |
void mxc_iomux_set_pad | ( | iomux_pin_name_t | pin, | |
u32 | config | |||
) |
This function configures the pad value for a IOMUX pin.
pin | a pin number as defined in iomux_pin_name_t | |
config | the ORed value of elements defined in iomux_pad_config_t |
int mxc_request_iomux | ( | iomux_pin_name_t | pin, | |
iomux_pin_cfg_t | config | |||
) |
Request ownership for an IO pin. This function has to be the first one being called before that pin is used. The caller has to check the return value to make sure it returns 0.
pin | a name defined by iomux_pin_name_t | |
config | config as defined in iomux_pin_ocfg_t |
© Freescale Semiconductor, Inc., 2007.
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